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7
7.3 Internal State Immediately after Reset Release
The table below lists the register state of the device immediately after it has gotten out of reset. For
details about the initial register state of each internal peripheral I/O, refer to each section in this
manual where the relevant internal peripheral I/O is described.
Table 7.3.1 Internal State Immediately after Reset
Register
PSW
(CR0)
CBR
(CR1)
SPI
(CR2)
SPU
(CR3)
BPC
(CR6)
PC
ACC (accumulator) Indeterminate
Note: When in boot mode, this changes to the start address of the boot program space (H'8000 0000).
7.3 Internal State Immediately after Reset Release
State after Reset Release
B'0000 0000 0000 0000 ??00 000? 0000 0000 (BSM, BIE, BC bits = indeterminate)
H'0000 0000 (C bit = 0)
Indeterminate
Indeterminate
Indeterminate
H'0000 0000 (Executed beginning with address H'0000 0000) (Note)
7-3
RESET
Ver.0.10
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