Mitsubishi Electric M32R Series User Manual page 365

Mitsubishi 32-bit risc single-chip microcomputers
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10
(3) Precautions to be observed when using TOP delayed single-shot output mode
The following describes precautions to be observed when using TOP delayed single-shot output
mode.
• If the counter stops due to underflow in the same clock period as the timer is enabled by
external input, the former has priority (so that the counter stops).
• If the counter stops due to underflow in the same clock period as count is enabled by writing to
the enable bit, the latter has priority (so that count is enabled).
• If the timer is enabled by external input in the same clock period as count is disabled by writing
to the enable bit, the latter has priority (so that count is disabled).
• Even when the counter overflows due to correction of counts, no interrupt is generated for the
occurrence of overflow. When the counter underflows in the subsequent down-count after
overflow, a false underflow interrupt is generated due to overcounting.
• When you read the counter immediately after reloading it pursuant to underflow, the value you
get is temporarily H'FFFF. But this counter value immediately changes to (reload value - 1) at
the next clock edge.
Count clock
Enable bit
Counter value
Reload register
Figure 10.3.19 Counter Value Immediately after Underflow
"H"
H'0001
H'0000
H'AAAA
10-95
MULTIJUNCTION TIMERS
10.3 TOP (Output-related 16-bit Timer)
Reload due to
underflow
Down-count starting
from reloaded register
Reload
value
cycle
H'FFFF
During reload cycle, you always see H'FFFF,
and not the reload register value (in this case,
H'AAAA).
H'AAA9
H'AAA8
H'(AAAA-1)
H'(AAAA-2)
Ver.0.10

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