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10
TLCK Input Processing Control Register (TCLKCR)
D0
1
2
TCLK3S
D
Bit Name
0, 1
No functions assigned
2, 3
TCLK3S
(TCLK3 input
processing selection)
4
No functions assigned
5 - 7
TCLK2S
(TCLK2 input
processing selection)
8
No functions assigned
9 - 11
TCLK1S
(TCLK1 input
processing selection)
12, 13
No functions assigned
14, 15
TCLK0S
(TCLK0 input
processing selection)
Note: This register must always be accessed in halfwords.
3
4
5
6
TCLK2S
Function
00 : 1/2 internal peripheral clock
01 : Rising edge
10 : Falling edge
11 : Both edges
000 : Invalidates input
001 : Rising edge
010 : Falling edge
011 : Both edges
10X : Low level
11X : High level
000 : Invalidates input
001 : Rising edge
010 : Falling edge
011 : Both edges
10X : Low level
11X : High level
00 : 1/2 internal peripheral clock
01 : Rising edge
10 : Falling edge
11 : Both edges
10-21
MULTIJUNCTION TIMERS
10.2 Common Units of Multijunction Timer
7
8
9
10
11
TCLK1S
<Address: H'0080 0210>
12
13
14
D15
TCLK0S
<When reset : H'0000>
R
0
0
0
0
Ver.0.10
W
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