Mitsubishi Electric M32R Series User Manual page 723

Mitsubishi 32-bit risc single-chip microcomputers

Table of Contents

(2) When Bus Mode Control Register = 1

When HREQ pin input is pulled low and the hold request is accepted, the 32170 goes to a hold state

and outputs a low from the HACK pin. During hold state, all bus related pins are placed in the high-

impedance state, allowing data to be transferred on the system bus. To exit the hold state and

return to normal operating state, release the HREQ signal back high.

Note 1 : Circles

Note 2 : Hi-z indicate the high-impedance state.

Note 3 : Idle cycles are inserted only when the hold state is assumed after external lead access.

Figure 15.3.2 Bus Arbitration Timing

above indicate points at which signals are sampled.

EXTERNAL BUS INTERFACE

15.3 Bus Arbitration