Mitsubishi Electric M32R Series User Manual page 839

Appendix 2
The following shows the number of memory access cycles in IF and MEM stages. Shown here are
the minimum number of cycles required for memory access. Therefore, these values do not always
reflect the number of cycles required for actual memory or bus access.
In write access, for example, although the CPU finishes the MEM stage by only writing to the write
buffer, this operation actually is followed by a write to memory. Depending on the memory or bus
state before or after the CPU requested a memory access, the instruction processing may take
more time than the calculated value.
R (read cycle)
When existing in instruction queue ............................................................................. 1
When reading internal resource (ROM, RAM) ........................................................... 1
When reading internal resource (SFR)(byte, halfword) .............................................. 2
When reading internal resource (SFR)(word) ............................................................ 4
When reading external memory (byte, halfword) ....................................................... 5 (Note)
When reading external memory (word) ...................................................................... 9 (Note)
When successively fetching instructions from external memory ................................ 8 (Note)
W (write cycle)
When writing to internal resource (RAM) ................................................................... 1
When writing to internal resource (SFR)(byte, halfword) ........................................... 2
When writing to internal resource (SFR)(word) .......................................................... 4
When writing to external memory (byte, halfword) ..................................................... 4 (Note)
When writing to external memory (word) .................................................................... 8 (Note)
Note: This applies for external access with one wait cycle. (When the 32170 accesses external
circuits, it requires at least one wait cycle inserted.)
INSTRUCTION PROCESSING TIME
Appendix 2.1 32170 Instruction Processing Time
Appendix 2-3
Cycles
Cycles
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