Mitsubishi Electric M32R Series User Manual page 107

Mitsubishi 32-bit risc single-chip microcomputers

Table of Contents

[EIT Processing]

(1) Saving SM, IE, and C bits

The SM, IE, and C bits of the PSW register are saved to their backup bits – the BSM, BIE,

and BC bits.

(2) Updating SM, IE, and C bits

The SM, IE, and C bits of the PSW register are updated as shown below.

(3) Saving PC

The content (always word boundary) of the PC register is saved to the BPC register.

(4) Branching to the EIT vector entry

Control branches to the address H'0000 0080 in the user space. However, when operating

in flash E/W enable mode, control goes to the beginning of the internal RAM (address

H'0080 4000). (For details, refer to Section 6.5, "Writing to Internal Flash Memory.") This is

the last operation performed in hardware preprocessing by the M32R/E.

(5) Jumping from the EIT vector entry to the user-created handler

The M32R/E executes the "BRA" instruction written at address H'0000 0080 of the EIT

vector entry by the user to jump to the start address of the user-created handler. At the

beginning of the EIT handler you created, first save the BPC and PSW registers and the

necessary general-purpose registers to the stack.

(6) Returning from the EIT handler

At the end of the EIT handler, restore the general-purpose registers and the BPC and PSW

registers from the stack and then execute the "RTE" instruction. As you execute the "RTE"

instruction, hardware postprocessing is automatically performed by the M32R/E.

4.9 Interrupt Processing