Mitsubishi Electric M32R Series User Manual page 613

Mitsubishi 32-bit risc single-chip microcomputers

Table of Contents

• Flags indicating the status of UART receive operation

Following flags are available that indicate the status of receive operation during UART mode.

• SIO Receive Control Register receive status bit

• SIO Receive Control Register receive-finished bit

• SIO Receive Control Register receive error sum bit

• SIO Receive Control Register overrun error bit

• SIO Receive Control Register parity error bit

• SIO Receive Control Register framing error bit

The manner in which the receive-finished bit and various error bit flags are cleared varies

depending on whether an overrun error has occurred or not, as described below.

[When no overrun error has occurred]

Said bits can be cleared by reading the lower byte from the receive buffer register or clearing the

receive enable bit to 0.

[When an overrun error has occurred]

Said bits can only be cleared by clearing the receive enable bit to 0.

12.9 Precautions on Using UART Mode