Built-In Clock Frequency Multiplier; Built-In Powerful Peripheral Functions - Mitsubishi Electric M32R Series User Manual

1

1.1.4 Built-in Clock Frequency Multiplier

• The 32170 internally multiplies the input clock signal frequency by 4 and the internal peripheral
clock by 2. If the input clock frequency is 10.0 MHz, the CPU clock frequency will be 40 MHz
and the internal clock frequency 20 MHz.

1.1.5 Built-in Powerful Peripheral Functions

(1) Built-in multijunction timer (MJT)
• The multijunction timer is configured with the following timers:
16-bit output-related timer × 35 channels
16-bit input/output-related timer × 10 channels
16-bit input-related timer × 11 channels (incorporating three channels of multiply-by-4
counter)
32-bit input-related timer × 8 channels
Each timer has multiple modes of operation, which can be selected according of the purpose of use.
• The multijunction timer has internal clock bus, input event bus, and output event bus, allowing
multiple timers to be combined for use internally. This provides a flexible way to make use of
timer functions.
• The output-related timers (TOP) have a correction function. This function allows the timer's
count value in progress to be increased or reduced as desired, thus materializing real-time
output control.
(2) Built-in 10-channel DMA
• The 10-channel DMA is built-in, supporting data transfers between internal peripheral I/Os or
between internal peripheral I/O and internal RAM. Not only can DMA transfer requests be
generated in software, but can also be triggered by a signal generated by an internal
peripheral I/O (e.g., A-D converter, MJT, or serial I/O).
• Cascaded connection between DMA channels (DMA transfer in a channel is started by
completion of transfer in another) is also supported, allowing for high-speed transfer
processing without imposing any extra load on the CPU.
(3) Built-in 16-channel A-D converters
• The 32170 contains two 16-channel A-D converters which can convert data in 10-bit
resolution. In addition to single A-D conversion in each channel, successive A-D conversion in
four, eight, or 16 channels combined into one unit is possible.
• In addition to ordinary A-D conversion, a comparator mode is supported in which the A-D
conversion result is compared with a given set value to determine the relative magnitudes of
two quantities.
• When A-D conversion is completed, the 32170 can generate not only an interrupt, but can also
generate a DMA transfer request.
• The 32170 supports two read out modes, so that A-D conversion results can be read out in 8
bits or 10 bits.
1-4
OVERVIEW
1.1 Outline of the 32170
Ver.0.10