Mitsubishi Electric M32R Series User Manual page 78

3
Address
D0
H'0080 0B96
H'0080 0B98
H'0080 0B9A
H'0080 0B9C
H'0080 0B9E
H'0080 0BA0
H'0080 0BA2
H'0080 0BA4
H'0080 0BA6
H'0080 0BA8
H'0080 0BAA
H'0080 0BAC
H'0080 0BAE
H'0080 0BB0
H'0080 0BB2
H'0080 0BB4
H'0080 0BB6
H'0080 0BB8
H'0080 0BBA
H'0080 0BBC
H'0080 0BBE
H'0080 0BC0
H'0080 0BC2
H'0080 0BC4
H'0080 0BC6
H'0080 0BC8
H'0080 0BCA
H'0080 0BCC
H'0080 0BCE
H'0080 0BD0
H'0080 0BD2
H'0080 0BD4
H'0080 0BD6
H'0080 0BD8
H'0080 0BDA
H'0080 0BDC
H'0080 0BDE
~ ~
H'0080 0C8C
H'0080 0C8E
H'0080 0C90
H'0080 0C92
H'0080 0C94
H'0080 0C96
H'0080 0C98
H'0080 0C9A
H'0080 0C9C
Blank addresses are reserved areas.
Figure 3.4.14 Register Mapping of the SFR Area (11)
+0 Address
TOD1_0 Reload 0 Register (TOD10RL0)
TOD1_1 Reload 1 Register (TOD11RL1)
TOD1_1 Reload 0 Register (TOD11RL0)
TOD1_2 Reload 1 Register (TOD12RL1)
TOD1_2 Reload 0 Register (TOD12RL0)
TOD1_3 Reload 1 Register (TOD13RL1)
TOD1_3 Reload 0 Register (TOD13RL0)
TOD1_4 Reload 1 Register (TOD14RL1)
TOD1_4 Reload 0 Register (TOD14RL0)
TOD1_5 Reload 1 Register (TOD15RL1)
TOD1_5 Reload 0 Register (TOD15RL0)
TOD1_6 Reload 1 Register (TOD16RL1)
TOD1_6 Reload 0 Register (TOD16RL0)
TOD1_7 Reload 1 Register (TOD17RL1)
TOD1_7 Reload 0 Register (TOD17RL0)
Prescaler Register 4 (PRS4)
TOD1 Interrupt Mask Register (TOD1IMA)
TOD1 Control Register (TOD1CR)
TOM0_0 Reload 1 Register (TOM00RL1)
TOM0_0 Reload 0 Register (TOM00RL0)
TOM0_1 Reload 1 Register (TOM01RL1)
3-22
D7 D8
TOD1_1 Counter (TOD11CT)
TOD1_2 Counter (TOD12CT)
TOD1_3 Counter (TOD13CT)
TOD1_4 Counter (TOD14CT)
TOD1_5 Counter (TOD15CT)
TOD1_6 Counter (TOD16CT)
TOD1_7 Counter (TOD17CT)
TID1 Control & Prescaler 4 Enable Register (TID1PRS4EN)
TOD1 Interrupt Status Register (TOD1IST)
F/F Protect Register 3 (FFP3)
F/F Data Register 3 (FFD3)
TOD1 Enable Protect Register (TOD1PRO)
TOD1 Count Enable Register (TOD1CEN)
TID2 Counter (TID2CT)
TID2 Reload Register (TID2RL)
TOM0_0 Counter (TOM00CT)
TOM0_1 Counter (TOM01CT)
ADDRESS SPACE
3.4 Internal ROM/SFR Area
+1 Address
D15
Ver.0.10
~ ~