Extending Or Modifying The Design; Adding Or Removing Ip Cores - Xilinx ML40 Series User Manual

Edk processor reference design
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Chapter 2: ML40x Embedded Processor Reference System

Extending or Modifying the Design

The ML40x Embedded Processor Reference System is a good starting point from which a
user can add, remove, or modify components in the system. Because most of the IP in the
design is attached to the CoreConnect infrastructure under EDK, adding or removing
devices is a fairly straightforward process. Below is an overview for making various
changes to the system.

Adding or Removing IP Cores

To remove an IP core:
1.
2.
3.
To add an IP core:
1.
2.
3.
4.
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Delete the instantiation for that piece of IP from the system.mhs file (or use the
Add/Edit Cores feature of the EDK GUI).
Delete all corresponding external I/O ports from the system.mhs file.
Remove corresponding UCF file entries specifying timing or pinout locations for that
IP.
Instantiate the device by adding it to the system.mhs file (or use the Add/Edit Cores
feature of the EDK GUI).
Connect its external I/O to the top level.
Set its configuration parameters (i.e., base address) in the system.mhs file (or use the
Add/Edit Cores feature of the EDK GUI).
Add appropriate timing and pinout constraints to the UCF file.
www.xilinx.com
ML40x EDK Processor Reference Design
UG082 (v5.0) June 30, 2006
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