Schedule Of Figures - Xilinx ML40 Series User Manual

Schedule of Figures

Chapter 1: Introduction to the ML40x Embedded Processor Reference
System
Chapter 2: ML40x Embedded Processor Reference System
Figure 2-1: Hardware View of ML40x Embedded MicroBlaze Reference System . . . . . 20
Figure 2-2: Hardware View of ML40x Embedded PPC405 Reference System . . . . . . . . . 21
Figure 2-3: Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Chapter 3: EDK Tutorial and Demonstration
Chapter 4: Introduction to Hardware Reference IP
Chapter 5: Using IPIF to Build IP
Figure 5-1: IPIF SRAM Module Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 5-2: IPIF Simple SRAM Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 5-3: IPIF Simple SRAM Read Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 5-4: IPIF SRAM Module to GPIO Logic Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Chapter 6: OPB AC97 Sound Controller
Figure 6-1: OPB AC97 Sound Controller Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Chapter 7: OPB PS/2 Controller (Dual)
Figure 7-1: OPB PS/2 Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Chapter 8: PLB TFT LCD Controller
Figure 8-1: High-Level Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Figure 8-2: Hsync and TFT Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 8-3: Horizontal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 8-4: Vsync and h_syncs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Figure 8-5: Vertical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
ML40x EDK Processor Reference Design
UG082 (v5.0) June 30, 2006
www.xilinx.com 7