Xilinx ML40 Series User Manual page 21

R
ML40x EDK Processor Reference Design
UG082 (v5.0) June 30, 2006
BRAM
PPC405
MEMC
Processor Block
DSPLB
ISPLB
INT
TFT
LCD
Controller
DDR
MEMC
PLB
ARB
Figure 2-2: Hardware View of ML40x Embedded PPC405 Reference System
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GPIO
BRAM
GPIO
INTC
System ACE
MPU
Ethernet
PS/2
PS/2
IIC
GPIO
GPIO
DDR
Memory
UART
PLB2OPB
Bridge
EMC
EMC
AC97
Sound
Controller
DCR
Bridge
OPB
ARB
Hardware
Char
LCD
Expansion
Header
Buttons, LEDs, IIC,
and misc. I/Os
ZBT
SRAM
Flash
USB
Memory Mapped
DCR Bus
UG082_02_02_050406
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