Mitsubishi Electric MELSEC Q Series User Manual page 330

(7) CPU shared memory
A memory in a multiple CPU system that stores data to cooperation between CPU modules. It is cleared to 0 at
power OFF or reset.
Remark
For data communication function by the CPU shared memory, refer to the following.
Page 252, Section 14.1.1
(8) Data refresh memory
A memory that stores device data to be read/written by the data refresh function. It is cleared to 0 at power OFF
or reset.
Remark
For data refresh between the data refresh memory and user device(s), refer to the following.
Page 171, Section 11.7.1
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