Mitsubishi Electric MELSEC Q Series User Manual page 274

Receiving side program for CPU No.2
272
Processing flow
(The numbers from 1) through 9) represent
the execution sequence.))
3) Transmitted data set complete bit ON is detected.
4) Received data processing is performed.
5) Received data complete bit ON is written into the
user setting area.
The multiple CPU high speed transmission area
data in the No.2 module are automatically
transmitted to the No.1 module.
8) Transmitted data set complete bit OFF is detected.
9) Received data processing complete bit OFF is
written into the user setting area.