Mitsubishi Electric MELSEC Q Series User Manual page 264

(2) Memory structure
The following illustrates memory configuration in the multiple CPU high speed transmission area.
No. Name
Multiple CPU high speed
1)
transmission area
2) CPU No.n send area
3) User setting area
4) Auto refresh area
*1 : A value obtained by subtracting the number of points set in the auto refresh area from the No.n module's automatic transmission
area size.
262
1) Multiple CPU
high speed
transmission area
• The area for data communications between CPU modules
in a multiple CPU system.
• The area where send data of each CPU module are stored.
• Data stored in the host CPU's send area are sent to another
CPU.
• Data received from another CPU are stored in the send
area for another CPU.
• The area for transmission/reception of data to/from other
CPUs by reading/writing by the user program without using
auto refresh.
• The area for communicating device data with other CPUs
using auto refresh.
• Auto refresh area is assigned from behind the No.n module
transmission area.
2) CPU No.1 send area
2) CPU No.2 send area
2) CPU No.3 send area
2) CPU No.4 send area
Description
3) User setting area
4) Auto refresh area
Size
Setting
range
0 to 14K
words
0 to 14K
words
*1
–
0 to 14K
words
Setting
unit
1K word
1K word
–
2 word