Table 2-7. Rr Register; Table 2-8. Rr Fields; Results Register (Rr) - Sharp LH79524 User Manual

Analog-to-Digital Converter/Brownout Detector

2.2.2.3 Results Register (RR)

RR is the Results register. This register contains the oldest entry of the 16-entry × 16-bit
wide result FIFO. Its index in the FIFO's memory array is contained in the Read Pointer
(RDPTR) bit field in the FIFO Status Register (see Section 2.2.2.9). This register contains
the 10-bit ADC output and the 4-bit tag number from the Control Bank State Machine.
When the FIFO is full, further data writes are temporarily blocked until at least one location
is available for a write. Reading from RR removes the oldest entry from the result FIFO and
increments the RDPTR.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:16
15:6
5:4
3:0
2-14
31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
ADCOUT
0 0 0 0 0
RO RO RO RO RO
NAME
/// Reserved Reading returns 0. Write the reset value.
ADCOUT ADC Output Contains the 10-bit digital output of the ADC.
/// Reserved Reading returns 0. Write the reset value.
Control Bank Tag Specifies the entry number (HWCTRLBxx or
CBTAG LWCTRLBxx) of the Control bank. The entry number (x) ranges from 0 to
15, corresponding to the conversion associated with the bit result.

Table 2-7. RR Register

26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
0 0 0 0
RO RO RO RO
0xFFFC3000 + 0x08

Table 2-8. RR Fields

DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
/// CBTAG
0 0 0 0 0
RO RO RO RO RO
17 16
0 0
RO RO
1 0
0 0
RO RO