Ethernet MAC Controller
6.3.4.7 Specific Address 3 Bottom (SPECAD3BOT)
This register contains the least-significant bits of the destination address (bits [31:0]). Bit
zero indicates whether the address is multicast or unicast and corresponds to the least
significant bit of the first byte received.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:0
6.3.4.8 Specific Address 3 Top (SPECAD3TOP)
This register contains the most-significant bits of the destination address (bits [47:32]).
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
BITS
31:16
15:0
6-52
Table 6-88. SPECAD3BOT Register
31
30
29
28
27
0
0
0
0
0
RW
RW
RW
RW
RW
15
14
13
12
11
0
0
0
0
0
RW
RW
RW
RW
RW
Table 6-89. SPECAD3BOT Fields
NAME
Least Significant Destination Address Bits Least significant bits
SPECAD3BOT
of the destination address.
Table 6-90. SPECAD3TOP Register
31
30
29
28
27
0
0
0
0
0
RO
RO
RO
RO
RO
15
14
13
12
11
0
0
0
0
0
RW
RW
RW
RW
RW
Table 6-91. SPECAD3TOP Fields
NAME
///
Reserved Reading returns 0. Write the reset value.
Most Significant Destination Address Bits The most significant
SPECAD3TOP
bits of the destination address.
26
25
24
23
SPECAD3BOT
0
0
0
0
RW
RW
RW
RW
10
9
8
7
SPECAD3BOT
0
0
0
0
RW
RW
RW
RW
0xFFFC7000 + 0xA8
FUNCTION
26
25
24
23
///
0
0
0
0
RO
RO
RO
RO
10
9
8
7
SPECAD3TOP
0
0
0
0
RW
RW
RW
RW
0xFFFC7000 + 0xAC
FUNCTION
Version 1.0
LH79524/LH79525 User's Guide
22
21
20
19
18
0
0
0
0
0
RW
RW
RW
RW
RW
6
5
4
3
2
0
0
0
0
0
RW
RW
RW
RW
RW
22
21
20
19
18
0
0
0
0
0
RO
RO
RO
RO
RO
6
5
4
3
2
0
0
0
0
0
RW
RW
RW
RW
RW
17
16
0
0
RW
RW
1
0
0
0
RW
RW
17
16
0
0
RO
RO
1
0
0
0
RW
RW