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Chapter 9
2
I
C Module
2
The I
C Module implements the Inter-IC bus (I
• Two-wire synchronous serial interface
• Operation in both the standard mode, for data rates up to 100 Mbits/s, and the fast
mode, with data rates up to 400 Mbits/s
• Communication with devices in the fast mode as well as the standard mode if both are
attached to the bus.
2
The I
C Module block diagram appears in Figure 9-1.
APB
REGISTER
INTERFACE
HCLK
INTERRUPT
Figure 9-1. I
Version 1.0
2
C), and provides:
START/STOP
REGISTERS
ARBITRATION
CONTROL
IN/OUT
CLOCK
DATA SHIFT
CONTROL
REGISTER
ADDRESS
COMPARE
2
C Module Block Diagram
SCL
SDA
LH79525-56
9-1
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