Table 14-5. Ctrl1 Register; Table 14-6. Ctrl1 Fields; Control Register 1 (Ctrl1) - Sharp LH79524 User Manual

Synchronous Serial Port

14.2.2.2 Control Register 1 (CTRL1)

CTRL1 is the Control Register 1. CTRL1 contains four bit fields that control various SSP
functions.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS NAME
31:4
3
2
1
0
14-12

Table 14-5. CTRL1 Register

31 30 29 28 27
0 0 0 0 0
RO RO RO RO RO
15 14 13 12 11
0 0 0 0 0
RO RO RO RO RO
/// Reserved Reading returns 0. Write the reset value.
Slave Mode Output Disable This bit is relevant only in the slave mode
(MS = 1). In multiple-slave systems, it is possible for an SSP master to broadcast a
message to all slaves in the system while ensuring that only one slave drives data
onto its serial output line. In such systems the RX lines from multiple slaves could
SOD
be tied together. To operate in such systems, the SOD bit can be programmed to 1.
1 = SSP must not drive the SSPTX output in slave mode
0 = SSP can drive the SSPTX output in slave mode
Master or Slave Mode Select This bit can only be modified when the SSP is
disabled, SSE = 0.
MS
1 = device configured as slave
0 = device configured as master
Synchronous Serial Port Enable This bit enables and disables the SSP.
SSE
1 = SSP operation is enabled
0 = SSP operation is disabled
Loopback Mode Program this bit to enable or disable Loopback mode:
1 = Enables Loopback mode, internally connecting the Transmit serial shifter out-
LBM
put to the Receive serial shifter input
0 = Enables normal serial port operation, disabling Loopback mode
26 25 24 23
///
0 0 0 0
RO RO RO RO
10 9 8 7
///
0 0 0 0
RO RO RO RO
0xFFFC6000 + 0x004

Table 14-6. CTRL1 Fields

DESCRIPTION
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
SOD MS
0 0 0 0 0
RO RO RO RW RW
17 16
0 0
RO RO
1 0
SSE LBM
0 0
RW RW