Figure 10-4. Driving/Latching Diagram; Driving/Latching Edges - Sharp LH79524 User Manual

2
I S Converter
2
The I S converter operates in both Master and Slave Modes. In Master Mode, the clock
and word select inputs (SSPCLKOUT and SSPFSSOUT) are supplied by the SSP block.
In slave mode, the clock and word select inputs are supplied by the external CODEC via
the PB3/SSPCLK/I2SCLK and PB2/SSPFRM/I2SWS pins.
2
The I S Converter requires the SSP to be enabled and operating in continuous mode. It is
also required that the SSP operate in full duplex mode (SOD = 0) while the I
is enabled. The SOD allows the SSP to operate in receive-only mode which may result in
a condition where the channel indicated by the TXFIFO (left or right) may differ from the
channel indicated by the RXFIFO. The I
respect to which channel each is expecting. If the FIFOs become out of sync, then the
behavior of the I
receive-only mode of the SSP.
The SSPOE_n signal from the SSP is altered by the I
data pad whenever the I
enable passes unchanged through the I

10.1.2 Driving/Latching Edges

The SSP and any device connected to it is expected to drive data and the frame pulse
on the rising edge of the clock and latch both on the falling edge of the clock. The I
ification states that the I
of the clock but both are always latched on the rising edge of the clock.
Therefore, the data and frame pulse received by the I
falling edge of the clock and moved to the rising edge of the clock. The data and word
strobe received by the I
clock. If the I
without being altered by the I
10-4
2
S may be unpredictable. For this reason, I
2
S is enabled. If the I
2
S Converter may drive data and the word strobe on either edge
2
S at the pins of the chip are sampled on the rising edge of the
2
S Converter is disabled, the SSP data and frame pulse are passed through
2
S.
SSP
SSPCLKOUT
SSPFSSIN
SSPRXD
SSPCLKIN
SSPFSSIN
SSPRXD

Figure 10-4. Driving/Latching Diagram

Version 1.0
LH79524/LH79525 User's Guide
2
S Converter requires the FIFOs to be in sync with
2
S is not compatible with
2
S Converter to enable the transmit
2
S Converter is disabled, then the output
2
S Converter.
2
S from the SSP are sampled on the
2
I S CONVERTER
SSPCLKOUT SSPCLK_I2SCLK_OUT
SSPFSSIN SSPFRM_I2SWS_OUT
SSPRXD SSPRX_I2RXD_OUT
SSPCLKIN SSPCLK_I2SCLK_IN
SSPFSSIN SSPFRM_I2SWS_IN
SSPRXD SSPRX_I2SRXD_IN
2
S Converter
2
S Spec-
LH79525-87