Control Signal Timing; Figure 22.20 Reset Input Timing; Figure 22.21 Reset Output Timing - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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22.7.2

Control Signal Timing

Control signal timing is shown as follows:
• Reset input timing
Figure 22.20 shows the reset input timing.
• Reset output timing *
Figure 22.21 shows the reset output timing.
• Interrupt input timing
Figure 22.22 shows the interrupt input timing for NMI and IRQ
φ
RES
FWE
MD
to MD
2
0
φ
RESO
Note: * This function is used only in mask ROM models, and is not provided in flash memory
models.
754
t
RESS
t
MDS

Figure 22.20 Reset Input Timing

t
RESD

Figure 22.21 Reset Output Timing *

to IRQ
.
5
0
t
RESS
t
RESW
t
RESD
t
RESOW

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