Table 19.8 System Clock Frequencies For Which Automatic Adjustment Of H8/3062F-Ztat B-Mask Version Bit Rate Is Possible - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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Automatic SCI Bit Rate Adjustment:
Start
bit
When boot mode is initiated, the H8/3062F-ZTAT B-mask version measures the low period of the
asynchronous SCI communication data (H'00) transmitted continuously from the host. The SCI
transmit/receive format should be set as 8-bit data, 1 stop bit, no parity. The H8/3062F-ZTAT B-
mask version calculates the bit rate of the transmission from the host from the measured low
period, and transmits one H'00 byte to the host to indicate the end of bit rate adjustment. The host
should confirm that this adjustment end indication (H'00) has been received normally, and
transmit one H'55 byte to the H8/3062F-ZTAT B-mask version. If reception cannot be performed
normally, initiate boot mode again (reset), and repeat the above operations. Depending on the
host's transmission bit rate and the H8/3062F-ZTAT B-mask version's system clock frequency,
there will be a discrepancy between the bit rates of the host and the H8/3062F-ZTAT B-mask
version. To ensure correct SCI operation, the host's transfer bit rate should be set to 4800, 9600, or
19,200 bps * .
Table 19.8 shows typical host transfer bit rates and system clock frequencies for which automatic
adjustment of the H8/3062F-ZTAT B-mask version bit rate is possible. The boot program should
be executed within this system clock range.
Table 19.8 System Clock Frequencies for which Automatic Adjustment of H8/3062F-ZTAT
B-Mask Version Bit Rate is Possible
Host Bit Rate (bps)
19,200
9,600
4,800
Note: * Only use a setting of 4800, 9600, or 19200 for the host's bit rate. No other settings can be
used.
Although the H8/3062F-ZTAT B-mask version may also perform automatic bit rate
adjustment with bit rate and system clock combinations other than those shown in table
19.8, a degree of error will arise between the bit rates of the host and the MCU, and
subsequent transfer will not be performed normally. Therefore, only a combination of bit
596
D0
D1
D2
Low period (9 bits) measured (H'00 data)
System Clock Frequency for which Automatic
Adjustment of H8/3062F-ZTAT B-Mask Version Bit Rate
is Possible (MHz)
16 to 25
8 to 25
4 to 25
D3
D4
D5
Stop
D6
D7
bit
High period
(1 or more bits)

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