Interrupts; Usage Notes; Figure 11.8 Contention Between Tcnt Write And Count Up - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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11.4

Interrupts

During interval timer operation, an overflow generates an interval timer interrupt (WOVI). The
interval timer interrupt is requested whenever the OVF flag is set to 1 in TCSR.
11.5

Usage Notes

Contention between TCNT Write and Increment: If a timer counter clock pulse is generated
during the T
state of a write cycle to TCNT, the write takes priority and the timer count is not
3
incremented. See figure 11.8.
φ
TCNT
Internal write
signal
TCNT input
clock
TCNT

Figure 11.8 Contention between TCNT Write and Count up

Changing CKS2 to CKS0 Bit: Halt TCNT by clearing the TME bit to 0 in TCSR before
changing the values of bits CKS2 to CKS0.
360
CPU: TCNT write cycle
T
T
1
2
N
T
3
M
Counter write data

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