A/D Converter Activation; 8-Bit Timer Application Example; Figure 9.17 Example Of Pulse Output - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series

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A/D Converter Activation

The A/D converter can only be activated by channel 0 compare match A.

If the ADTE bit setting is 1 when the CMFA flag in 8TCSR0 is set to 1 by generation of channel 0

compare match A, an A/D conversion start request will be issued to the A/D converter. If the

TRGE bit in ADCR is 1 at this time, the A/D converter will be started. If the ADTE bit in

8TCSR0 is 1, A/D converter external trigger pin (ADTRG) input is disabled.

Figure 9.17 shows how the 8-bit timer module can be used to output pulses with any desired duty

cycle. The settings for this example are as follows:

• Clear the CCLR1 bit to 0 and set the CCLR0 bit to 1 in 8TCR so that 8TCNT is cleared by a

TCORA compare match.

• Set bits OIS3, OIS2, OS1, and OS0 to (0110) in 8TCSR so that 1 is output on a TCORA

compare match and 0 is output on a TCORB compare match.

The above settings enable a waveform with the cycle determined by TCORA and the pulse width

detected by TCORB to be output without software intervention.

Counter clear