Block Diagram; Figure 6.1 Block Diagram Of Bus Controller - Hitachi H8/3062 Hardware Manual

6.1.2

Block Diagram

Figure 6.1 shows a block diagram of the bus controller.
Internal address bus
WAIT
Internal signals
CPU bus request signal
CPU bus acknowledge signal
Legend:
ABWCR : Bus width control register
ASTCR : Access state control register
WCRH : Wait control register H
WCRL : Wait control register L
BRCR : Bus release control register
CSCR : Chip select control register
Address control register
ADRCR * :
Bus control register
BCR :
Note: * This register is not provided in the H8/3062F-ZTAT.
124
CS to CS
0 7
Area
decoder
Chip select
control signals

Figure 6.1 Block Diagram of Bus Controller

ABWCR
ASTCR
BCR
CSCR
ADRCR
Bus control
circuit
Wait state
controller
WCRH
WCRL
BRCR
Bus arbiter
BACK
BREQ
Internal signals
Bus mode control signal
Bus size control signal
Access state control signal
Wait request signal