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Interrupt Exception Handling Sequence; Figure 5.7 Interrupt Exception Handling Sequence - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series

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5.4.2

Interrupt Exception Handling Sequence

Figure 5.7 shows the interrupt exception handling sequence in mode 2 when the program code and

stack are in an external memory area accessed in two states via a 16-bit bus.

Figure 5.7 Interrupt Exception Handling Sequence

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