System Control Register (Syscr) - Hitachi H8/3062 Hardware Manual

Bits 7 and 6—Reserved: These bits can not be modified and are always read as 1.
Bits 5 to 3—Reserved: These bits can not be modified and are always read as 0.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the logic levels at pins
MD to MD (the current operating mode). MDS2 to MDS0 correspond to MD
2 0
MDS0 are read-only bits. The mode pin (MD
MDCR is read.
Note: The versions with on-chip flash memory have a boot mode in which flash memory can be
programmed. In boot mode, the MDS2 bit value is the inverse of the level at the MD
3.3

System Control Register (SYSCR)

SYSCR is an 8-bit register that controls the operation of the H8/3062 Series.
Bit 7
SSBY
Initial value 0
Read/Write R/W
Software standby
Enables transition to software standby mode
to MD
2
6 5 4
STS2 STS1 STS0
0 0 0
R/W R/W R/W
Standby timer select 2 to 0
These bits select the waiting time at
recovery from software standby mode
) levels are latched into these bits when
0
3 2
UE NMIEG
1 0
R/W R/W
Software standby
output port enable
Selects the output state
of the address bus and
bus control signals in
software standby mode
NMI edge select
Selects the valid edge
of the NMI input
User bit enable
Selects whether to use the UI bit in CCR
as a user bit or an interrupt mask bit
to MD . MDS2 to
2 0
pin.
2
1 0
SSOE RAME
0 1
R/W R/W
RAM enable
Enables or
disables
on-chip RAM
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