8.1.4
Register Configuration
Table 8.3 summarizes the 16-bit timer registers.
Table 8.3
16-bit timer Registers
Address *
Channel
Common
H'FFF60
H'FFF61
H'FFF62
H'FFF63
H'FFF64
H'FFF65
H'FFF66
0
H'FFF68
H'FFF69
H'FFF6A
H'FFF6B
H'FFF6C
H'FFF6D
H'FFF6E
H'FFF6F
1
H'FFF70
H'FFF71
H'FFF72
H'FFF73
H'FFF74
H'FFF75
H'FFF76
H'FFF77
1
Name
Timer start register
Timer synchro register
Timer mode register
Timer output level setting register
Timer interrupt status register A
Timer interrupt status register B
Timer interrupt status register C
Timer control register 0
Timer I/O control register 0
Timer counter 0H
Timer counter 0L
General register A0H
General register A0L
General register B0H
General register B0L
Timer control register 1
Timer I/O control register 1
Timer counter 1H
Timer counter 1L
General register A1H
General register A1L
General register B1H
General register B1L
Abbre-
viation
R/W
TSTR
R/W
TSNC
R/W
TMDR
R/W
TOLR
W
2
R/(W) *
TISRA
2
R/(W) *
TISRB
2
R/(W) *
TISRC
16TCR0
R/W
TIOR0
R/W
16TCNT0H R/W
16TCNT0L R/W
GRA0H
R/W
GRA0L
R/W
GRB0H
R/W
GRB0L
R/W
16TCR1
R/W
TIOR1
R/W
16TCNT1H R/W
16TCNT1L R/W
GRA1H
R/W
GRA1L
R/W
GRB1H
R/W
GRB1L
R/W
Initial
Value
H'F8
H'F8
H'98
H'C0
H'88
H'88
H'88
H'80
H'88
H'00
H'00
H'FF
H'FF
H'FF
H'FF
H'80
H'88
H'00
H'00
H'FF
H'FF
H'FF
H'FF
227