Executing The Jtag Debug_Request Instruction; External Debug Request During Stop Mode; External Debug Request During Wait Mode - Motorola DSP56305 User Manual

instructions fetched by the interrupt processing or instructions that will be aborted by
the interrupt processing.
Note: In this case the chip completes the execution of the current instruction and
stops after the newly fetched instruction enters the instruction latch.
10.7.3

Executing the JTAG DEBUG_REQUEST Instruction

Executing the JTAG instruction DEBUG_REQUEST asserts an internal debug request
signal. Consequently, the chip finishes the execution of the current instruction and stops
after the newly fetched instruction enters the instruction latch. After entering the Debug
mode, the Core Status bits OS1 and OS0 are set and the DE line is asserted, thus
acknowledging the external command controller that the Debug mode of operation has
been entered.
10.7.4

External Debug Request During Stop Mode

Executing the JTAG instruction DEBUG_REQUEST (or asserting DE) while the chip is in
the Stop state (i. e., has executed a STOP instruction) causes the chip to exit the Stop state
and enter the Debug mode. After receiving the acknowledge, the external command
controller must negate DE before sending the first command.
Note: In this case, the chip completes the execution of the STOP instruction and halts
after the next instruction enters the instruction latch.
10.7.5

External Debug Request During Wait Mode

Executing the JTAG instruction DEBUG_REQUEST (or asserting DE) while the chip is in
the Wait state (i. e., has executed a WAIT instruction) causes the chip to exit the Wait
state and enter the Debug mode. After receiving the acknowledge, the external
command controller must negate DE before sending the first command.
Note: In this case, the chip completes the execution of the WAIT instruction and
halts after the next instruction enters the instruction latch.
MOTOROLA DSP56305 User's Manual
On-Chip Emulation Module
Methods of Entering the Debug Mode
10-17