Reserved Bits 12-15; Once Trace Logic; Figure 10-8 Once Trace Logic Block Diagram - Motorola DSP56305 User Manual

On-Chip Emulation Module

OnCE Trace Logic

10.5.6.8

Reserved Bits 12-15

Bits 12–15 are reserved for future use. They are read as 0 and should be written with 0 for
future compatibility.
10.6 OnCE TRACE LOGIC
Using the OnCE Trace Logic, execution of instructions in single or multiple steps is
possible. The OnCE Trace Logic causes the chip to enter the Debug mode of operation
after the execution of one or more instructions and wait for OnCE commands from the
debug serial port. The OnCE Trace Logic block diagram is shown in Figure 10-8.
End of Instruction
TDI
DEC
TDO
Trace Counter
TCK
Count = 0
ISTRACE
AA0708

Figure 10-8 OnCE Trace Logic Block Diagram

The Trace mode has a counter associated with it so that more than one instruction can be
executed before returning back to the Debug mode of operation. The objective of the
counter is to allow the user to take multiple instruction steps real-time before entering
the Debug mode. This feature helps the software developer debug sections of code that
do not have a normal flow or are getting hung up in infinite loops. The Trace Counter
also enables the user to count the number of instructions executed in a code segment.
To enable the Trace mode of operation, the counter is loaded with a value, the program
counter is set to the start location of the instruction(s) to be executed real-time, the TME
bit is set in the OSCR, and the DSP56300 core exits the Debug mode by executing the
appropriate command issued by the external command controller.
MOTOROLA DSP56305 User's Manual 10-15