Insert Address Enable (Iae) Bit 21 - Motorola DSP56305 User Manual

6.5.2.14

Insert Address Enable (IAE) Bit 21

The IAE bit is used, in the PCI mode (HM = $1), to insert the PCI transaction address at
the head of the incoming data stream from the host in accordance with the value of the
host data transfer format (HTF) bits in the HCTR.
If the HI32 is being accessed in a write transaction, and if IAE is set, the HI32 writes the
PCI transaction address to the HTXR before the data written by the host.
If HTF = $0 (32-bit mode): first, the two least significant bytes of the PCI transaction
address are written to the two least significant bytes of the HTXR, then the two most
significant bytes of the PCI transaction address (the address is inserted as
$00HHHH, $00LLLL, where HHHH = HAD[31:16] and LLLL = HAD[15:0]).
If HTF≠$0: only the two least significant bytes of the PCI transaction address are written
to the two least significant bytes of the HTXR (the address is inserted as $00LLLL, where
LLLL = HAD[15:0]).
The incoming data is written to the HTXR after the address.
IAE is ignored when the HI32 is not in the PCI mode (HM≠$1).
The value of IAE may be changed only when HACT = 0 or HDTC = 1.
Hardware and software resets clear IAE.
6.5.2.15 DPCR Reserved Control Bits 23, 22,17,13,11,10, 8, 6, 3, 0
These bits are reserved for future expansion, they are read as zeros and should be
written with zeros for upward compatibility.
MOTOROLA DSP56305 User's Manual
HOST INTERFACE (HI32)
DSP SIDE Programming Model
6-27