Memory Space Indicator (Msi) Bit 0 - Motorola DSP56305 User Manual

HOST INTERFACE (HI32)
HOST SIDE Programming Model
6.6.11 Memory Space Base Address Configuration Register (CBMA)
31 30 29 28
PM31 PM30 PM29 PM28
15 14 13 12
PM15 PM14 PM13 PM12
Hardwired to zero
Bit
0 MSI
2-1 MS1-MS0
3 PF
15-4 PM15-PM4
31-16 PM31-PM16
23-16 GB10-GB3
The CBMA is a PCI standard 32-bit read/write register mapped into the PCI
configuration space, when in the PCI mode or in mode 0 (HM=$1 or $0). The CBMA is
accessed if a configuration read/write command is in progress and the PCI address is
$10. The CBMA controls the HI32 mapping into the PCI memory space and the
Universal Bus mode space. In the Self Configuration mode (HM = $5): the DSP56300 core
can indirectly access the CBMA (Section 6.7).
The CBMA is written in accordance with the byte enables. Byte lanes that are not
enabled are not written and the corresponding bits remain unchanged.
The CBMA cannot be accessed by the host when not in the PCI mode (HM≠$1).
The CBMA bits are described in the following paragraphs.
6.6.11.1

Memory Space Indicator (MSI) Bit 0

The MSI determines that CBMA register maps the HI32 into the PCI memory space. The
MSI bit is hardwired to zero and is not affected by any type of reset.
6-86
27 26 25 24
PM27 PM26 PM25 PM24
11 10 9 8
PM11 PM10 PM9 PM8
Name
Memory Space Indicator (Hardwired to zero)
Memory Space (Hardwired to zeros)
Pre-fetch (Hardwired to zero)
Memory Base Address Low (Hardwired to zeros)
Memory Base Address High
Universal Bus mode Base Address
DSP56305 User's Manual
23 22 21 20
PM
PM23/ PM22/ PM21/ 20/
GB10 GB9 GB98 GB7
7 6 5 4
PM7 PM6 PM5 PM4
Function
19 18 17 16
PM19/ PM18/ PM17/ PM16/
GB6 GB5 GB4 GB3
3 2 1 0
PF MS1 MS0 MSI
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