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7.4.3.2
Serial Input Flag 1 (IF1) SSISR Bit 1
The IF1 bit is enabled only when SC1 is an input flag and the Synchronous mode is
selected (i.e., when SC1 is programmed as ESSI in the Port Control Register (PCR), the
SYN bit is set, and the TE2 and SCD1 bits are cleared). See Figure 7-4.
The ESSI latches data present on the SC1 signal during reception of the first received bit
after the frame sync is detected. The IF1 bit is updated with this data when the data in
the Receive Shift Register is transferred into the Receive Data Register.
If it is not enabled, the IF1 bit is cleared.
Hardware, software, ESSI individual, and stop reset clear the IF1 bit.
7.4.3.3
Transmit Frame Sync Flag (TFS) SSISR Bit 2
When set, TFS indicates that a transmit frame sync occurred in the current time slot. TFS
is set at the start of the first time slot in the frame and cleared during all other time slots.
If the transmitter is enabled, data written to a Transmit Data Register during the time
slot when TFS is set will be transmitted (in Network mode) during the second time slot
in the frame. TFS is useful in Network mode to identify the start of a frame. TFS is valid
only if at least one transmitter is enabled (TE0, TE1, or TE2 are set).
TFS is cleared by hardware, software, ESSI individual, or stop reset.
Note:
In Normal mode, TFS is always read as 1 when transmitting data because
there is only one time slot per frame, the 'frame sync' time slot.
7.4.3.4
Receive Frame Sync Flag (RFS) SSISR Bit 3
When set, the RFS bit indicates that a receive frame sync occurred during the reception
of a word in the serial Receive Data Register. This means that the data word is from the
first time slot in the frame. When the RFS bit is cleared and a word is received, it
indicates (only in the Network mode) that the frame sync did not occur during reception
of that word. RFS is valid only if the receiver is enabled (i.e., the RE bit is set).
RFS is cleared by hardware, software, ESSI individual, or stop reset.
Note:
In Normal mode, RFS is always read as 1 when reading data because there is
only one time slot per frame, the 'frame sync' time slot.
MOTOROLA
Enhanced Synchronous Serial Interface (ESSI)
DSP56305 User's Manual
ESSI Programming Model
7-35
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