Figure 7-9 Essi Transmit Slot Mask Register A (Tsma) (Essi0 X:$Ffffb4, Essi1 X:$Ffffa4); Figure 7-10 Essi Transmit Slot Mask Register B (Tsmb) (Essi0 X:$Ffffb3, Essi1 X:$Ffffa3); Figure 7-11 Essi Receive Slot Mask Register A (Rsma) (Essi0 X:$Ffffb2, Essi1 X:$Ffffa2); Figure 7-12 Essi Receive Slot Mask Register B (Rsmb) (Essi0 X:$Ffffb1, Essi1 X:$Ffffa1) - Motorola DSP56305 User Manual

24-bit digital signal processor
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Enhanced Synchronous Serial Interface (ESSI)
ESSI Programming Model
11
10
9
TS11
TS10
TS9
23
22
21
Figure 7-9 ESSI Transmit Slot Mask Register A (TSMA) (ESSI0 X:$FFFFB4, ESSI1
11
10
9
TS27
TS26
TS25
23
22
21
Figure 7-10 ESSI Transmit Slot Mask Register B (TSMB) (ESSI0 X:$FFFFB3, ESSI1
11
10
9
RS11
RS10
RS9
23
22
21
Figure 7-11 ESSI Receive Slot Mask Register A (RSMA) (ESSI0 X:$FFFFB2, ESSI1
11
10
9
RS27
RS26
RS25
23
22
21
– Reserved bit - read as zero should be written with zero for future compatibility
Figure 7-12 ESSI Receive Slot Mask Register B (RSMB) (ESSI0 X:$FFFFB1, ESSI1
Note:
The Transmit and Receive Slot Mask registers are each 24-bit, of which only
the lower 16 bits are significant, so TSMA/TSMB and RSMA/RSMB can
function as the bottom and top halves of a 32-bit register.
7-14
8
7
6
TS8
TS7
TS6
20
19
18
X:$FFFFA4)
8
7
6
TS24
TS23
TS22
20
19
18
X:$FFFFA3)
8
7
6
RS8
RS7
RS6
20
19
18
X:$FFFFA2)
8
7
6
RS24
RS23
RS22
20
19
18
X:$FFFFA1)
DSP56305 User's Manual
5
4
3
TS5
TS4
TS3
17
16
15
TS15
5
4
3
TS21
TS20
TS19
17
16
15
TS31
5
4
3
RS5
RS4
RS3
17
16
15
RS15
5
4
3
RS21
RS20
RS19
17
16
15
RS31
2
1
0
TS2
TS1
TS0
14
13
12
TS14
TS13
TS12
AA0860
2
1
0
TS18
TS17
TS16
14
13
12
TS30
TS29
TS28
AA0861
2
1
0
RS2
RS1
RS0
14
13
12
RS14
RS13
RS12
AA0862
2
1
0
RS18
RS17
RS16
14
13
12
RS30
RS29
RS28
AA0863
MOTOROLA

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