Figure 7-2 Sckn Pin Configuration; Serial Clock (Sck) - Motorola DSP56305 User Manual

Enhanced Synchronous Serial Interface (ESSI)
ESSI Data and Control Signals
7.3.3

Serial Clock (SCK)

The SCK signal is a bidirectional signal providing the serial bit rate clock for the ESSI
interface. The SCK signal is a clock input or output used by all the enabled transmitters
and receivers in Synchronous modes or by all the enabled transmitters in Asynchronous
modes (see Figure 7-2, Table 7-1, and Figure 7-13).
Synchronous
operation?
Pin
direction?
Input
SCKn
TX Clock
pin is...
Note: "n" in SCKn is ESSI (0 or 1)
SCK may be programmed as a GPIO signal (P3) when the ESSI SCK function is not being
used.
1. Although an external serial clock can be independent of and asynchronous
Notes:
to the DSP system clock, the external ESSI clock frequency must not exceed
F /3, and each ESSI phase must exceed the minimum of 1.5 CLKOUT
core
cycles.
2. The internally sourced ESSI clock frequency must not exceed F
7-6
Async
0
Mode
0 1
SCKD
Output
CRB
TX Clock

Figure 7-2 SCKn Pin Configuration

DSP56305 User's Manual
SCKn Pin
Sync
1
SYN
Mode
CRB
0
Input
TX/RX
Clock
1
SCKD
Output
CRB
TX/RX
Clock
AA1458
/4.
core
MOTOROLA