Essi Data And Control Signals; Serial Transmit Data Signal (Std) - Motorola DSP56305 User Manual

Enhanced Synchronous Serial Interface (ESSI)

ESSI Data and Control Signals

• Network Enhancements
– Time Slot Mask Registers (receive and transmit) added, typically obviating the
need for software time slot counters
– End-of-frame interrupt added
– Drive Enable signal added (to be used with transmitter 0)
• Audio Enhancements
– Three transmitters per ESSI (Both ESSIs may be used together for six-channel
surround sound.)
• General Enhancements
– DMA transfers can be triggered by receive or transmit events
– Separate exception enable bits
• Other Changes
– One divide-by-2 removed from the internal clock source chain
– CRA(PSR) bit definition is reversed
– Gated Clock mode not available
7.3 ESSI DATA AND CONTROL SIGNALS
Three to six signals are required for ESSI operation, depending on the operating mode
selected. The Serial Transmit Data (STD) signal and Serial Control (SC0 and SC1) signals
are fully synchronized to the clock if they are programmed as transmit-data signals.
7.3.1

Serial Transmit Data Signal (STD)

The STD signal is used for transmitting data from the TX0 Serial Transmit Shift Register.
STD is an output when data is being transmitted from TX0 Shift Register. With an
internally generated bit clock, the STD signal becomes a high impedance output signal
for a full clock period after the last data bit has been transmitted. If sequential data
words are being transmitted, the STD signal does not assume a high-impedance state.
The STD signal may be programmed as a General Purpose Input/Output (GPIO) signal
(P5) when the ESSI STD function is not being used.
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