Slave Receive Data Request (Srrq) Bit 2 - Motorola DSP56305 User Manual

24-bit digital signal processor
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HOST INTERFACE (HI32)
DSP SIDE Programming Model
In the PCI mode (HM = $1):
• Fetch (SFT = 1): The DSP-to-host data path is a six word deep (three word deep in
the 32-bit data format mode, HRF = $0) FIFO buffer. During a read transaction
from the DTXS-HRXS FIFO, STRQ reflects the status of the DTXS: STRQ is set if
the DTXS is not full. STRQ is cleared when the DSP56300 core fills the DTXS. If
the host is not executing a read transaction from the HRXS, the DSP-to-host data
path is forced to the reset state and STRQ is cleared.
In a Universal Bus mode (HM = $2 or $3):
• Fetch (SFT = 1): There is no FIFO buffering of the DSP-to-host data path. At the
beginning of a read data transfer from the HRXS, STRQ is set. STRQ is cleared
when the DSP56300 core writes to the DTXS. If the host is not reading from the
HRXS, the DSP-to-host data path is forced to the reset and STRQ is cleared.
In both the PCI and Universal Bus modes (HM = $1, $2 or $3):
• Pre-fetch (SFT = 0): The DSP-to-host data path is a six word deep (three word
deep in the 32-bit data format mode, HM = $1 and HRF = $0) FIFO buffer. STRQ
reflects the status of the DTXS: STRQ is set if the DTXS is not full. STRQ is cleared
when the DSP56300 core fills the DTXS.
If STRQ is set
• if STIE is set, a slave transmit data interrupt request is generated
• if enabled by an DSP56300 core DMA channel, a slave transmit data DMA request
will be generated.
Hardware, software and personal software resets set STRQ. In the personal software
reset state STRQ = 0.
6.5.5.3

Slave Receive Data Request (SRRQ) Bit 2

The SRRQ bit indicates that the receive data FIFO (DRXR) contains data written by the
host processor to the HI32 slave. When an external host writes data to the host-to-DSP
FIFO (HTXR-DRXR), SRRQ is set. SRRQ is cleared if the DRXR is emptied by DSP56300
core reads; or the data to be read from the DRXR is master data.
If SRRQ is set
• if SRIE is set, a slave receive data interrupt request is generated
• if enabled by an DSP56300 core DMA channel, a slave receive data DMA request
will be generated.
Hardware, software and personal software resets clear SRRQ.
6-36
DSP56305 User's Manual
MOTOROLA

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