Table 6-19 Interrupt Vectors; Via Programming - Motorola DSP56305 User Manual

HOST INTERFACE (HI32)
INTERRUPT VECTORS
6.9 INTERRUPT VECTORS
Vector / 2
Via Programmable
Via Programmable Base + 1 PCI Transaction Abort
Via Programmable Base + 2 PCI Parity Error
Via Programmable Base + 3 PCI Transfer Complete
Via Programmable Base + 4 PCI Master Receive
Via Programmable Base + 5 Slave Receive
Via Programmable Base + 6 PCI Master Transmit
Via Programmable Base + 7 Slave Transmit
Via Programmable Base + 8 PCI Master Address
6.10

VIA PROGRAMMING

Below is a table of the DSP56305 via-programmable registers:
Register
CDID CDID15-CDID0
CCCR CCCR23-CCCR0
CRID CRID7-CRID0
6-106

Table 6-19 Interrupt Vectors

Interrupt
Host Command (default)
PCI Transaction Termination TO, TRTY, TDIS (DPSR)
Bits Value
$1802
$048000
$00
DSP56305 User's Manual
Activated by
HC (HCVR)
TAB, MAB (DPSR)
DPER, APER (DPSR)
HDTC (DPSR)
MRRQ (DPSR)
SRRQ (DSR)
MTRQ (DPSR)
STRQ (DSR)
MARQ (DPSR)
Meaning
DSP56305
$04:(Multimedia Device)
$80:(Other Multimedia Device)
$00:(Default Program Interface)
Rev 0
Priority
Highest
Lowest
MOTOROLA