Program Ram Enable B (Peb)—Bit 3 - Motorola DSP56009 User Manual

24-bit digital signal processor
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Memory, Operating Modes, and Interrupts
Operating Modes
are shown in Figure 3-1 on page 3-6 and Figure 3-2 on page 3-6. PEA is cleared by
hardware reset.
3.4.3
Program RAM Enable B (PEB)—Bit 3
The Program RAM Enable B (PEB) bit is used to map 768 words of the internal X data
memory and 768 words of the internal Y data memory into internal Program RAM.
When PEB is set, 768 words of X data RAM (locations $0F00–$11FF) and 768 words of
Y data RAM (locations $0E00–$10FF) are mapped into the program space (locations
$0200–$07FF). The internal memory maps, as controlled by the PEB bit, are shown in
Figure 3-3 on page 3-7 and Figure 3-4 on page 3-7. PEB is cleared by hardware reset.
3.4.4
Stop Delay (SD)—Bit 6
When leaving the Stop state, the Stop Delay (SD) bit is interrogated. If cleared
(SD = 0), a 65,535 core clock cycle delay (131,072 T states) is implemented before
continuation of the STOP instruction cycle. If the SD bit is set (SD = 1), the delay
before continuation of the STOP instruction cycle is set as eight clock cycles (16 T
states). When the DSP is driven by a stable external clock source, setting the SD bit
before executing the STOP instruction will allow a faster start up of the DSP.
3.5
OPERATING MODES
The DSP56009 operating modes are defined as described below and summarized in
Table 3-3 on page 3-13. The operating modes are latched from pins MODA, MODB,
and MODC during reset and can be changed by writing to the OMR. The operating
modes defined are compatible with the DSP56004. One new mode was defined,
mode 2, which ends up in the first location of the Program ROM (address $2000).
Each operating mode is described below.
• Mode 0—In this mode, the internal Program RAM is enabled and the
bootstrap ROM is disabled. All bootstrap programs end by selecting this
operating mode. This is identical to the DSP56001/DSP56002 Mode 0. It is not
possible to reach this operating mode during hardware reset. If an attempt is
made, the chip will default to Mode 1. Mode 1 bootstrap terminates by setting
the operating mode to 0 and jumping to the reset vector at address $0000.
3-12
DSP56009 User's Manual
MOTOROLA

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