GE N60 Instruction Manual page 335

CHAPTER 5: SETTINGS
This feature allows simple manipulations on eight-bit numbers. In particular, two numbers can be added or subtracted
depending on a user-programmable dynamic condition. User-programmable threshold, hysteresis, direction of
comparison, pickup, and dropout time delays can be applied.
The two input arguments are user-configurable as collections of FlexLogic operands using the binary encoding
convention. This allows bringing analog values from remote locations via communication-based inputs/outputs to
facilitate telemetry and other advanced applications. The two values to be added or subtracted should have a common
scaling and be of the same type. For example, adding voltage and current does not yield meaningful results.
This element is typically applied in conjunction with the digitizer feature.
to
8BIT COMP 1 ARG A0 8BIT COMP 1 ARG A7
representation of the first argument, A, of the comparator. The
bit, while the
8BIT COMP 1 ARG A6
sign bit (asserted for negative values). In other words, the following convention is used:
A
Care must be taken to avoid race conditions for the used bits (FlexLogic operands). If the eight bits are not changing
simultaneously (for example, when some of the bits arrive via contact inputs and the others arrive via direct inputs), a race
condition can occur, leading to severe over- or under-estimation of the resulting eight-bit number. For example, assume
the integer value changes from 15 to 16, that is from 00001111 to 00010000, but transiently the A4 bit asserts before the
A3 through A0 bits de-assert. As a result, a value of 00011111, or 31, is produced, resulting in almost 100% overestimation
compared to a true value of 16.
To prevent problems, pickup and dropout time delays must be applied to avoid misoperation, or all eight bits must be
configured to change simultaneously (for example, applied to the relay via the same communications).
to
BIT COMP 1 ARG B0 8BIT COMP 1 ARG B7
representation of the second argument, B, of the comparator. The
significant bit, while the
8BIT COMP 1 ARG B6
the sign bit (asserted for negative values). In other words the following convention is used:
B
— This setting specifies whether a signed or absolute value is used for comparison with the pickup
8BIT COMP 1 INPUT MODE
threshold. This setting applies to the effective operating signal (that is, either A – B or A + B) and not to the individual inputs.
The following figure illustrates an effective operating characteristic resulting from this setting.
The actual value, as well as the
8BIT COMP 1 Out
without reference to this setting.
— This setting specifies if the element operates if the effective operating signal is above ("Over") or
8BIT COMP 1 DIRECTION
below ("Under") the threshold as illustrated in the following figure.
N60 NETWORK STABILITY AND SYNCHROPHASOR MEASUREMENT SYSTEM – INSTRUCTION MANUAL
8BIT COMP 1 SCALE

FACTOR: 1.00
8BIT COMP 1 BLOCK:

Off
8BIT COMP 1 TARGET:

Self-reset
8BIT COMP 1 EVENTS:

Disabled
— These settings specify FlexLogic operands that provide an eight-bit
setting represents the most significant bit. The
a
6 5 4
–    
= 1 7 2 a + 2 a + 2 a
6 5 4
— These settings specify FlexLogic operands that provide an eight-bit
setting represents the most significant bit. The
b
6 5 4
–    
= 1 7 2 b + 2 b + 2 b
6 5 4
8BIT COMP1 BIT0
Range: 0.01 to 100.00 in steps of 0.01
Range: FlexLogic operand
Range: Self-reset, Latched, Disabled
Range: Disabled, Enabled
setting represents the least significant
8BIT COMP 1 ARG A0
8BIT COMP 1 ARG A7
3 2 1 0

+ 2 a + 2 a + 2 a + 2 a
3 2 1 0
setting represents the least
8BIT COMP 1 ARG B0
3 2 1 0

+ 2 b + 2 b + 2 b + 2 b
3 2 1 0
through FlexLogic operands, are derived
8BIT COMP1 BIT7
CONTROL ELEMENTS
setting represents the
Eq. 5-21
setting is
8BIT COMP 1 ARG B7
Eq. 5-22
5-219
5