Table Of Contents - Hitachi SH7032 Hardware Manual

Section 1 Overview
1.1 SuperH Microcomputer Features .......................................................................................
1.2 Block Diagram....................................................................................................................
1.3 Pin Descriptions..................................................................................................................
1.3.1 Pin Arrangement ...................................................................................................
1.3.2 Pin Functions......................................................................................................... 11
1.3.3 Pin Layout by Mode.............................................................................................. 15
Section 2 CPU
...................................................................................................................... 17
2.1 Register Configuration ....................................................................................................... 17
2.1.1 General Registers (Rn).......................................................................................... 17
2.1.2 Control Registers................................................................................................... 18
2.1.3 System Registers ................................................................................................... 19
2.1.4 Initial Values of Registers ..................................................................................... 19
2.2 Data Formats ...................................................................................................................... 20
2.2.1 Data Format in Registers....................................................................................... 20
2.2.2 Data Format in Memory........................................................................................ 20
2.2.3 Immediate Data Format ........................................................................................ 21
2.3 Instruction Features ............................................................................................................ 21
2.3.1 RISC-Type Instruction Set.................................................................................... 21
2.3.2 Addressing Modes................................................................................................. 24
2.3.3 Instruction Formats ............................................................................................... 27
2.4 Instruction Set .................................................................................................................... 31
2.4.1 Instruction Set by Classification ........................................................................... 31
2.4.2 Operation Code Map ............................................................................................. 42
2.5 CPU State ........................................................................................................................... 45
2.5.1 State Transitions.................................................................................................... 45
2.5.2 Power-Down State ................................................................................................ 48
Section 3 Operating Modes
3.1 Types of Operating Modes and Their Selection................................................................. 49
3.2 Operating Mode Descriptions ............................................................................................ 49
3.2.1 Mode 0 (MCU Mode 0) ........................................................................................ 49
3.2.2 Mode 1 (MCU Mode 1) ........................................................................................ 49
3.2.3 Mode 2 (MCU Mode 2) ........................................................................................ 49
3.2.4 Mode 7 (PROM Mode) ......................................................................................... 49
Section 4 Exception Handling
4.1 Overview ............................................................................................................................ 51
Contents
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