Addressing Modes - Hitachi SH7032 Hardware Manual

2.3.2

Addressing Modes

Addressing modes and effective address calculation are described in table 2.8.
Table 2.8 Addressing Modes and Effective Addresses
Addressing Mnemonic
Mode Expression
Direct Rn
register
addressing
Indirect @Rn
register
addressing
Post-incre- @Rn +
ment
indirect
register
addressing
Pre-decre- @–Rn
ment
indirect
register
addressing
24
Effective Addresses Calculation
The effective address is register Rn. (The operand
is the contents of register Rn.)
The effective address is the contents of register Rn.
Rn
The effective address is the contents of register Rn.
A constant is added to the contents of Rn after the
instruction is executed. 1 is added for a byte
operation, 2 for a word operation, and 4 for a
longword operation.
Rn
Rn + 1/2/4
1/2/4
The effective address is the value obtained by
subtracting a constant from Rn. 1 is subtracted for
a byte operation, 2 for a word operation, and 4 for a
longword operation.
Rn
Rn – 1/2/4
1/2/4
Rn
Rn
+
–
Rn – 1/2/4
Equation
—
Rn
Rn
(After the
instruction is
executed)
Byte: Rn + 1
→ Rn
Word: Rn + 2
→ Rn
Longword:
Rn + 4 → Rn
Byte: Rn – 1
→ Rn
Word: Rn – 2
→ Rn
Longword:
Rn – 4 → Rn
(Instruction
executed
with Rn after
calculation)