Exception Processing Vector Table - Hitachi SH7095 Hardware User Manual

4.1.3

Exception Processing Vector Table

Before exception processing begins, the exception processing vector table must be written in
memory. The exception processing vector table stores the start addresses of exception service
routines. (The reset exception processing table holds the initial values of PC and SP.)
All exception sources are given different vector numbers and vector table address offsets, from
which the vector table addresses are calculated. During exception processing, the start addresses of
the exception service routines are fetched from the exception processing vector table.
Table 4.3 lists the vector numbers and vector table address offsets. Table 4.4 lists vector table
address calculations.
Table 4.3 Exception Processing Vector Table
Exception Sources
Power-on reset
Manual reset
General illegal instruction
(Reserved by system)
Slot illegal instruction
(Reserved by system)
CPU address error
DMA address error
Interrupts
(Reserved by system)
Trap instruction (user vector)
Vector
Numbers
PC 0
SP 1
PC 2
SP 3
4
5
6
7
8
9
10
NMI 11
User break 12
13
:
31
32
:
63
Vector Table Address Offset
H'00000000–H'00000003
H'00000004–H'00000007
H'00000008–H'0000000B
H'0000000C–H'0000000F
H'00000010–H'00000013
H'00000014–H'00000017
H'00000018–H'0000001B
H'0000001C–H'0000001F
H'00000020–H'00000023
H'00000024–H'00000027
H'00000028–H'0000002B
H'0000002C–H'0000002F
H'00000030–H'00000033
H'00000034–H'00000037
:
H'0000007C–H'0000007F
H'00000080–H'00000083
:
H'000000FC–H'000000FF
Vector Addresses
Vector number × 4
VBR + (vector
number × 4)
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