Dma Transfer Count Registers 0-3 (Tcr0-Tcr3); Dma Channel Control Registers 0-3 (Chcr0-Chcr3) - Hitachi SH7032 Hardware Manual

9.2.3 DMA Transfer Count Registers 0–3 (TCR0–TCR3)
DMA transfer count registers 0–3 (TCR0–TCR3) are 16-bit read/write registers that specify the
DMA transfer count (bytes or words). The number of transfers is 1 when the setting is H'0001,
65535 when the setting is H'FFFF, and 65536 (the maximum) when H'0000 is set. During a DMA
transfer, these registers indicate the remaining transfer count. The initial value after a reset or in
standby mode is undefined.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
9.2.4 DMA Channel Control Registers 0–3 (CHCR0–CHCR3)
DMA channel control registers 0–3 (CHCR0–CHCR3) are 16-bit read/write registers that control
the DMA transfer mode. They also indicate the DMA transfer status. They are initialized to
H'0000 by a reset and in standby mode.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W: R/(W) *
Notes: *1 Only 0 can be written, to clear the flag.
*2 Writing is valid only for CHCR0 and CHCR1.
15 14
— —
R/W R/W R/W
7 6
— —
R/W R/W R/W
15 14
DM1 DM0 SM1
0 0
R/W R/W R/W
7 6
AM AL DS
0 0
2 2
R/(W) * R/(W) *
13 12 11
— — —
R/W R/W
5 4 3
— — —
R/W R/W
13 12 11
SM0 RS3
0 0 0
R/W R/W
5 4 3
TM TS
0 0 0
2
R/W R/W
10 9
— — —
R/W R/W R/W
2 1
— — —
R/W R/W R/W
10 9
RS2 RS1 RS0
0 0
R/W R/W R/W
2 1
IE TE DE
0 0
1
R/(W) *
R/W R/W
8
0
8
0
0
0
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