Operation; Overview - Hitachi SH7032 Hardware Manual

Superh risc engine
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• Bit 1 (Group 1 Non-Overlap Mode (G1NOV)): G1NOV selects ordinary or non-overlap mode
for TPC output group 1 (TP7–TP4).
Bit 1: G1NOV
0
1
• Bit 0 (Group 0 Non-Overlap Mode (G0NOV)): G0NOV selects ordinary or non-overlap mode
for TPC output group 0 (TP3–TP0).
Bit 0: G0NOV
0
1
11.3

Operation

11.3.1

Overview

When corresponding bits in the PBCR1, PBCR2, NDERA, and NDERB registers are set to 1, TPC
output is enabled and the PBDR data register values are output. After that, when the compare
match event selected by TPCR occurs, the next data register contents (NDRA and NDRB) are
transferred to PBDR and output values are updated. Figure 11.2 illustrates the TPC output
operation.
322
Description
TPC output group 1 operates normally (output value updated
according to compare match A of the ITU channel selected by TPCR)
TPC output group 1 operates in non-overlap mode (1 output and 0
output can be performed independently according to compare match
A and B of the ITU channel selected by TPCR)
Description
TPC output group 0 operates normally (output value updated
according to compare match A of the ITU channel selected by TPCR)
TPC output group 0 operates in non-overlap mode (1 output and 0
output can be performed independently according to compare match A
and B of the ITU channel selected by TPCR)
(Initial value)
(Initial value)

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