Operation In Interval Timer Mode; Operation In Standby Mode - Hitachi SH7032 Hardware Manual

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Operation in Interval Timer Mode

To use the WDT as an interval timer, clear WT/IT to 0 and set TME to 1. An interval timer

interrupt (ITI) is generated each time the timer counter overflows. This function can be used to

generate interval timer interrupts at regular intervals (figure 12.5).

ITI: Interval timer interrupt request

The watchdog timer has a special function to clear standby mode with an NMI interrupt. When

using standby mode, set the WDT as described below.

Transition to Standby Mode: The TME bit in TCSR must be cleared to 0 to stop the watchdog

timer counter before it enters standby mode. The chip cannot enter standby mode while the TME

bit is set to 1. Set bits CKS2–CKS0 so that the counter overflow interval is equal to or longer than

the oscillation settling time. See sections 20.1.3 and 20.2.3, AC Characteristics, for the oscillation

settling time.

Recovery from Standby Mode: When an NMI request signal is received in standby mode, the

clock oscillator starts running and the watchdog timer starts counting at the rate selected by bits

CKS2–CKS0 before standby mode was entered. When TCNT overflows (changes from H'FF to

H'00), the system clock (φ) is presumed to be stable and usable; clock signals are supplied to the

entire chip and standby mode ends.

For details on standby mode, see section 19, Power Down State.

Figure 12.5 Operation in Interval Timer Mode

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