(8) Serial Communication Interface Timing
Table 20.12 Serial Communication Interface Timing
Case A: V
= 3.0 to 5.5 V, AV
CC
V
= AV
SS
SS
Case B: V
= 5.0 V ±10%, AV
CC
V
= AV
SS
SS
Note: * Regular-specification products; for wide-temperature-range products, Ta = –40 to +85°C
Item
Input clock cycle
Input clock cycle (synchronous mode)
Input clock pulse width
Input clock rise time
Input clock fall time
Transmit data delay time (synchronous
mode)
Receive data setup time (synchronous
mode)
Receive data hold time (synchronous
mode)
512
= 3.0 to 5.5 V, AV
CC
= 0 V, φ = 12.5 MHz, Ta = –20 to +75°C *
= 5.0 V ±10%, AV
CC
= 0 V, f = 20 MHz, Ta = –20 to +75°C *
SCK0, SCK1
Figure 20.40 Input Clock Timing
= V
CC
CC
= V
CC
CC
Cases A and B
Symbol
Min
t
4
scyc
t
6
scyc
t
0.4
sckw
t
—
sckr
t
—
sckf
t
—
TXD
t
100
RXS
t
100
RXH
t
t
SCKW
SCKr
t
scyc
±10%, AV
= 3.0 V to AV
ref
±10%, AV
= 4.5 V to AV
ref
Max
Unit
—
t
cyc
—
t
cyc
0.6
t
scyc
1.5
t
cyc
1.5
t
cyc
100
ns
—
ns
—
ns
t
SCKf
,
CC
,
CC
Figure
20.40
20.41