Mitsubishi Electric Melsec-F FX3GC Series User Manual page 126

FX /FX /FX /FX /FX
3S 3G 3GC 3U 3UC
Built-in Positioning Functions
Programming using the "Instruction execution complete" flag and "Instruction execution abnormal
end" flag:
1) If two or more positioning instructions are used in a program, the "Instruction execution complete" flag
(M8029) or "Instruction execution abnormal end" flag (M8329) will be turned on or off after execution of
each instruction. However, if the "Instruction execution complete" flag (M8029) and "Instruction execution
abnormal end" flag are used together for a program, it is difficult to determine which instruction turns them
ON/OFF and the "Instruction execution complete" flag will not be turned on for the intended instruction.
 To use a positioning instruction at a position other than just below the instruction, refer to the
Good
example:
The M8029 will function
as the "instruction
execution complete"
flag of DDRVI instruction.
The M8029 will function
as the "instruction
execution complete"
flag of DDRVA instruction.
Bad
The M8029 will function
example:
as the "instruction
execution complete" flag
of the lower DDRVA
instruction.
The M8029 will function
as the "instruction
execution complete" flag
of the lower DSW
instruction.
The M8029 will function
as the "instruction
execution complete" flag
of the upper DDRVI
instruction.
B - 82
PLC User's Manual - Positioning Control Edition
M0
FNC158
DDRVI
M8029
Completion
of instruction
execution
M8329
Abnormal
completion of
instruction execution
M1
FNC159
DDRVA
M8029
Completion
of instruction
execution
M8329
Abnormal
completion of
instruction execution
M8029
Completion of
instruction
execution
M8000
FNC 72
DSW
X000
SET
M0
FNC158
DDRVI
M8029
FNC 22
MUL
Compl-
etion of instruction execution
M1
FNC159
DDRVA
example shown on the next page.
K100000 K50000 Y000
M0
RST
M0
RST
K10000 K30000 Y001
M1
RST
M1
RST
Program for upper DDRVI
M0
RST
instruction
X10 Y10 D0
M0
K100000 K50000 Y000
D0 K10 D20
K10000 K30000 Y001
4 Before Programming
4.7 Items To Be Observed in Programming
Y004
Y005
K1
Y004
Upper DDRVI instruction
Program for DSW
instruction
Y005 Lower DDRVA instruction