Canon 1000 Service Manual page 85

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2. Functional Blocks
Figure 3-306 shows the organization of the PCB functional blocks.
Interface Board B1/B2
∗(h)
Color space correction
Control panel/Editor
Area data
Area data generation
Bit map data
Bit map memory
Bitmap data
If 'text synthesis', stores
text data read from the
original.
COPYRIGHT © 2001 CANON INC.
CANON CLC1000/1000S/3100 REV.2 MAY 2001 PRINTED IN JAPAN (IMPRIME AU JAPON)
Analog processor PCB
Controller
Selects a path for
∗(a)
image signals.
Shading correction
R,G,B
3-line CCD matching
∗(d)
R,G,B
∗(e)
ED board A1
R,G,B
∗(p)
Filter processing
R,G,B
∗(q)
Color conversion
R,G,B
∗(l)
Ratio processing
Color space correction
Y,M,C,Bk
Path selector
Y,M,C,Bk
∗(r)
Color editing/processing
Y,M,C,Bk
Note: The interface mother PCB and the image processor mother PCB are omitted from the block diagram to prevent confusion;
blocks with the ∗ mark are explained on pages that follow.
Video controller
R,G,B
Image processor PCB
R,G,B
Y,M,C,Bk
R,G,B
Bus selector
Y,M,C,Bk
(b)
∗(p)
Original position detection
(c)
Filter processing
R,G,B
∗(s)
Y,M,C,Bk
Mirror image
Density correction
R,G,B
∗(l)
Y,M,C,Bk
Input masking
Reduction
R,G,B
R,G,B
Y,M,C,Bk
∗(l)
Bus selector
Enlargement
Image synthesis
(f)
∗(k)
Y, M, C text signal
Moire removal
R,G,B
Text signal
∗(g)
Text extraction
Y,M,C
(h)
(i)
Background removal
Y, M, C conversion
(j)
Figure 3-306
Upon completion of all image processing, the image
signals are converted to RGB signals.
Y,M,C,Bk
Preview Monitor Board
RGB conversion
R,G,B
∗(t)
Output processing
R,G,B
CRT
The image signals from external
devices are stored in memory
without compression.
Y, M, C text signal
IP memory PCB
∗(m)
Image compression
∗(m)
Image memory
∗(m)
Image expansion
∗(n)
UCR processing (Bk signal generation)
Y,M,C,Bk
∗(o)
Output masking
Y,M,C,Bk
3-41

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