Toshiba GR200 Series Instruction Manual page 446

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Scheme logic

State transition diagram and scheme logic are shown in Figure 2.28-1 and Figure 2.28-2. It

should be noted that the scheme logic requires two binary inputs: circuit breaker (CB) OPEN

and circuit breaker (CB) CLOSED.

Under the normal operation, where the CB is closed, the CLP stays in STATE 0, and the

OC operates with a normal setting group.

When the CB opens, the scheme moves into STATE_1, then Cold-load-enable-timer

(TCLP) runs. If the CB closes again while the TCLP is running, the scheme will re-enter into

STATE_0. If the TCLP expires and the load is in cold, the scheme moves into STATE_2. When

the CB closes again, the scheme moves into STATE_3.

Cold-road-reset-timer (TCLP) runs at STATE_3. If the CB re-opens while the TCLP is

running, the scheme returns into STATE_2. If the TCLP is time out, the scheme moves into

STATE_0, where the load is considered as warm, and the setting of normal operation is applied

At STATE_2 and STATE_3, the setting group of the CLP is applied. The operation of the

CLP is forbidden by placing set of OFF for the scheme switch [CLP-EN].

Accelerated reset of the CLP is also possible. As being at STATE_3, poly-phase currents

are monitored by the function of inrush current detection (ICD). If poly-phase currents plunge

below the setting of ICD threshold, and when the duration of the plunge is longer than setting

[TCLP_DO], then the scheme automatically reverts into STATE_0. By placing set of ON for

scheme switch [CLP-DOEN], it is possible for the reset function to accelerate.

6F2S1915 (0.46)

GRZ200 (Soft 031 & 032)